Company:

Qualcomm Semiconductor Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

• Innovative standard cell circuit designer who excels in collaboration with various stakeholders

• Pathfinding of new logic technologies and creating library methodologies

• Competitive PPA analysis and driving stdcell library/logic in high performance CPU PPA differentiation

• Si validation of libraries with tracking yield, Vmin, power, and performance

• Leading failure analysis and maintaining reliability specification up to date

Qualifications:

• Knowledge in the digital CMOS circuit and layout designs

• Experiences in process technologies or SOC P&R designs desired

• Familiarity with foundry ecosystems desired

• Excellent communication and interpersonal skills to lead internal and external teams

• MS or Ph.D. or BS with experience in Electrical Engineering, Computer Science desired

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

OR

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field.

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EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification