Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

• 5 years of experience with verification methodologies and languages (e.g., UVM and SystemVerilog).

• Experience developing and maintaining verification testbenches, test cases, and test environments.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science.

• Experience in ARM and RISC-V processor based DV including tool chains and C based testing.

• Experience with different verification techniques and methodologies including formal, GLS, UPF based power simulations, and UVM and C based testing to achieve bug-free Silicon in SoCs.

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.

• Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.

• Create and enhance constrained-random verification environments using SystemVerilog and UVM or formally verify designs with SVA and industry leading formal tools.

• Identify and write all types of coverage measures for stimulus and corner-cases.

• Debug tests with design engineers to deliver functionally correct design blocks.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.